Changes for version 0.11 - 2005-05-11

  • when processing bit fields as bits (not logicals), the ENTIRE destination piddle was set to zero, for each chunk, not just the destination for the current chunk. this resulted not only in bogus data, but also slowed things down TREMENDOUSLY.

Modules

read and write FITS tables
support routines for using CFITSIO and PDL
generate a progress status update

Provides

in lib/Astro/FITS/CFITSIO/Simple.pm
in lib/Astro/FITS/CFITSIO/Simple/Image.pm
in lib/Astro/FITS/CFITSIO/Simple/PrintStatus.pm
in lib/Astro/FITS/CFITSIO/Simple/PrintStatus.pm
in lib/Astro/FITS/CFITSIO/Simple/PrintStatus.pm
in lib/Astro/FITS/CFITSIO/Simple/Table.pm